1. Field of the Invention
The present invention is related to a coupling isolation method and operational amplifier using the same, and more particularly, to a coupling isolation method and operational amplifier using the same which prevent a load signal from coupling into the operational amplifier through switching off a Miller compensation signal path.
2. Description of the Prior Art
With advances in semiconductor manufacturing technology, an accurate operational amplifier is essential for most electronic applications. As implied by the name, the operational amplifier is utilized for amplifying signals and functioning as a voltage buffer and driver. Other than the original use, the operational amplifier can implement various functions if connected in different configurations. For example, when connected in a negative feedback configuration, the operational amplifier can amplify a differential input signal to a specific multiple to perform common calculations, such as addition, multiplication, etc. Inversely, when connected in positive feedback, the operational amplifier can be utilized for generating an oscillating signal. Thus, the operational amplifier is widely employed in major electronic applications, such as a sample and hold (S/H) circuit, a liquid crystal display (LCD), etc.
Please refer to FIG. 1, which is a schematic diagram of an operational amplifier 10 of the prior art. The operational amplifier 10 includes a differential input stage 100, a gain stage 102, an output stage 104 and a Miller compensation module 106. The differential input stage 100 is utilized for receiving a differential input signal VIN. The gain stage 102 is utilized for amplifying the differential input signal VIN. Finally, the output stage 104 further amplifies the differential input signal VIN and enhances output resistance of the operational amplifier 10. In addition, the Miller compensation module 106 compensates frequency response of the operational amplifier 10 by adding a dominant pole on a signal path of the operational amplifier 10, so as to minimize influence of other poles on stability of a computation result RST. In general, in order to preserve the correct computation result RST, the operational amplifier 10 further includes an output switch 108 coupled between the output stage 104 and a load RL. To minimize influence of external noise on the operational amplifier 10, the output switch 108 is closed (switched on) only when an external circuit has to access (read) the computation result RST.
However, once the output switch 108 is closed, charges stored in two ends of the output switch 108 are redistributed, resulting in undesired spikes or notches in the computation result RST. Even worse, the singularities of the computation result RST couple into the operational amplifier 10 via the Miller compensation module 106, which decays performance of the operational amplifier 10. In detail, please refer to FIG. 2, which is a time-variant schematic diagram of signals of the operational amplifier 10. In FIG. 2, when the input signal VIN varies from a low potential to a high potential at a time point t1, inner signals of the operational amplifier 10 follow the variation through a closed-loop process inside the operational amplifier 10 and settle to fixed voltage levels. When the output switch 108 is switched on at the time point t1, charges stored in two ends of the output switch 108 redistribute, resulting in a notch in the computation result RST. In such a situation, notches are further induced in voltages VN1, VN2 of nodes N1, N2 of the operational amplifier 10, which increases a charging current of a transistor M1 and decreases a discharging current of a transistor M2 in the output stage 104, enabling rapid restoration of the computation result RST to the high potential. However, the restoration of the computation result RST leads to a second coupling, which accelerates the recovery of the voltages VN1, VN2 as well. As a result, a leakage current is generated in the operational amplifier 10 due to the simultaneous conduction of the transistors M1, M2, which delays a charging procedure of a load signal S_LD of the load RL, as illustrated in FIG. 2. In FIG. 2, the practical load signal S_LD increases slower than ideal waveforms.
Therefore, avoiding singular waveforms of the load signal induced by the second coupling has been a major focus of the industry.